This invention relates to an interface structure for semiconductor integrated circuit test equipment.
A semiconductor integrated circuit die has an array of contact pads distributed in a predetermined pattern over a major surface of the die.
Semiconductor integrated circuits may be tested at the wafer stage, prior to dicing the wafer and packaging the individual integrated circuit chips, and at the device stage, after dicing and packaging. In either case, the test equipment typically includes a test head for supplying stimulus signals to, and receiving response signals from, the device under test (DUT).
In wafer stage testing, a wafer prober positions the DUT at a test location for testing whereas for packaged device testing, a device handler is used to position the DUT for testing. For convenience in the following description it will be assumed that the DUT is in wafer form and that the test head is in the so-called DUT down orientation in which the test head is oriented to engage a DUT whose major surface is presented upwards.
The test head of a conventional general-purpose semiconductor integrated circuit tester includes a chassis, a docking plate attached to the chassis at the bottom of the test head, and multiple pin cards mounted in the chassis. Referring to FIG. 1, each pin card 4 is provided with a pogo block and switch module 8. Alignment pins 12 project from the module 8 and are received in alignment bores 14 of a docking plate 18 for precise positioning of the module 8 relative to the docking plate. The module 8 includes twenty-six electrical spring probe pins or contact pins 22. A suitable spring probe pin is commonly referred to as a pogo pin and includes a socket that is firmly secured in the body of the module 8, a barrel that is press fit into the socket, a plunger that is a sliding fit inside the barrel, and a spring inside the barrel urging the plunger toward a projecting position. As shown in FIG. 1, the plungers of the spring probe pins 22 project downwards beyond the docking plate.
The twenty-six spring probe pins 22 are arranged in two row of thirteen pins, and only one of these rows can be seen in FIG. 1. The thirteen pins in each row include one ground pin and eight signal I/O pins connected to the tester channel circuitry of the pin card and five auxiliary pins used for utility connections, for example for relay control. The sixteen signal I/O pins support eight or sixteen tester channels depending on tester configuration.
The spring probe pins 22 of the test head are distributed over an area that is much greater than the area of the major surface of the DUT. A prober interface structure is interposed between the spring probe pins 22 and the DUT and includes a prober interface board that is attached to the docking plate 18 and has on its upper side (the test head side) an array of pads that are engaged by the spring probe pins 22 and on its lower side (the DUT side) an array of pads distributed over an area that is smaller than the area occupied by the pads on the upper side of the prober interface board. A probe card is disposed parallel to the prober interface board and has an array of contact pads at its upper side corresponding to the array of contact pads at the lower side of the prober interface board and has probe needles projecting from its lower side for engaging the contact pads of the DUT. For reasons relating to the configuration of the conventional wafer prober, the probe card must generally be spaced by several centimeters from the prober interface board. Conventionally, this spacing is provided by a so-called pogo tower between the prober interface board and the probe card. A pogo tower typically comprises a generally cylindrical support structure and an array of double-ended spring probe pins that connect each contact pad on the lower side of the prober interface board to the corresponding contact pad on the upper side of the probe card.
During set-up of the tester, the prober interface board is positioned so that plungers of the spring probe pins 22 engage the pads on the upper side of the prober interface board and the prober interface board is then displaced towards the test head and secured to the docking plate, establishing electrically conductive pressure contact between the tip of each plunger and the respective contact pad.
The prober interface board must be manufactured with a high degree of precision to ensure that all the contact pads will remain in the correct positions, within the applicable tolerances, over the intended useful life of the board. The stringent requirements regarding the physical structure of the prober interface board result in the prober interface board being rather expensive to manufacture.
Although the test head of the conventional tester mentioned above can accommodate up to 64 pin cards, each of which may support sixteen I/O paths (for a total of 1024 I/O paths), some users of the conventional tester may require fewer than 1024 I/O paths and purchase a test head with fewer than 64 pin cards.
The conventional prober interface structure hitherto has been generally satisfactory, but as the frequencies of the signals that must be propagated between the pin cards and the probe card increases, the conventional prober interface structure approaches the limits of its performance. In particular, the I/O path should be able to propagate signals at frequencies in excess of 4 GHz with minimal cross talk and low return loss. Preferably, the signal paths should be matched in length to minimize need for deskew and to provide uniform I/O capacitance and performance. For example, the two paths that carry the two components of a differential signal should be matched in length to within about 2.5 mm. It is difficult to meet these demanding requirements in an interface structure that includes a printed circuit board of the size of a conventional probe interface board.
Another conventional prober interface structure comprises a prober interface board and a tower structure that is permanently attached to the prober interface board. The prober interface board has on its upper side an array of pads that are engaged by contact pins in the test head and the tower structure incorporates contact pins that project downwardly from the prober interface structure for engaging contact pads on the upper side of the probe card. The prober interface board has an array of pads distributed over its lower side, and each of these pads is connected to a corresponding contact pin of the tower structure by a cable that is attached at one end to the contact pad of the prober interface board and at its other end to the pogo pin of the tower structure.